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InfoMagic Standards 1994 January
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1988
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.rs
.\" Troff code generated by TPS Convert from ITU Original Files
.\" Not Copyright (~c) 1991
.\"
.\" Assumes tbl, eqn, MS macros, and lots of luck.
.TA 1c 2c 3c 4c 5c 6c 7c 8c
.ds CH
.ds CF
.EQ
delim @@
.EN
.nr LL 40.5P
.nr ll 40.5P
.nr HM 3P
.nr FM 6P
.nr PO 4P
.nr PD 9p
.po 4P
.rs
\v'|.5i'
.sp 2P
.LP
\fBRecommendation\ V.120\fR
.RT
.sp 2P
.ce 1000
\fBSUPPORT\ BY\ AN\ ISDN\ OF\ DATA\ TERMINAL\ EQUIPMENT\fR
.EF '% Fascicle\ VIII.1\ \(em\ Rec.\ V.120''
.OF '''Fascicle\ VIII.1\ \(em\ Rec.\ V.120 %'
.ce 0
.ce 1000
\fBWITH\ V\(hySERIES\ TYPE\ INTERFACES\ WITH\ PROVISION\fR
.ce 0
.sp 1P
.ce 1000
\fBFOR\ STATISTICAL\ MULTIPLEXING\fR
.ce 0
.sp 1P
.ce 1000
\fI(Melbourne, 1988)\fR
.sp 9p
.RT
.ce 0
.sp 1P
.LP
The\ CCITT,
.sp 1P
.RT
.sp 1P
.LP
\fIconsidering\fR
.sp 9p
.RT
.PP
(a)
that the ISDN will offer the universal interfaces to
connect subscriber terminals in accordance with the reference configuration
described in Recommendation\ I.411;
.PP
(b)
that during the evolution of ISDN there will exist for a considerable period
DTEs with V\(hySeries interfaces which need to connect to
ISDN;
.PP
(c)
that it would be desirable that terminals with V\(hySeries interfaces interwork
easily with ISDN TE1s;
.PP
(d)
that statistical multiplexing provides improved
utilization of bandwidth in some applications;
.PP
(e)
that the D channel signalling protocol is described in Recommendations\
I.430, I.431, Q.921 and Q.931;
.PP
(f)
that there exists CCITT Recommendation V.110 for
adapting DTEs with a V\(hySeries interface onto B\ Channels;
.sp 1P
.LP
\fIunanimously declares\fR
.sp 9p
.RT
.PP
(1)
that the scope of this Recommendation shall cover the
connection to the ISDN of terminals with interfaces for modems conforming to
current V\(hySeries Recommendations, operating in accordance with circuit or
leased circuit bearer services on bearer channels (B, H0, H11 or H12)
(see Note);
.PP
(2)
that the following circuit\(hyswitched services may be
supported:
.LP
\(em
multiplexing of several data links on a single bearer
channel; (and/or)
.LP
\(em
automatic establishment and disestablishment of additional
data links;
.PP
(3)
that the reference configurations of \(sc 1 shall apply;
.PP
(4)
that the terminal adaptor (TA) functions necessary to
support the connection of DTEs with V\(hySeries type interfaces on an ISDN
shall include the following:
.LP
\(em
conversion of the electrical and mechanical interface
characteristics;
.LP
\(em
bit rate adaption;
.LP
\(em
end\(hyto\(hyend synchronization;
.LP
\(em
call establishment and disestablishment based on either
manual or automatic calling and/or answering;
.LP
\(em
maintenance functions.
.PP
\fINote\fR \ \(em\ The compatibility of V.120 with protocols developed in
other Study Groups for Additional Packet Mode Bearer Service (APMBS) as
defined in Recommendation\ I.122 is for further study and the provisions
of this
Recommendation, V.120, shall not prejudice this study.
.PP
Significant further study related both to aspects of the protocol and the
alignment with other ISDN protocols is needed on this Recommendation.
.RT
.sp 2P
.LP
\fB1\fR \fBReference configurations\fR
.sp 1P
.RT
.sp 1P
.LP
1.1
\fICustomer access configurations\fR
.sp 9p
.RT
.PP
There are two basic classes of devices capable of data transmission in
the ISDN environment:
.RT
.LP
\(em
devices directly attached to the ISDN, i.e. TE1s; and
.LP
\(em
devices attached to the ISDN through a terminal adaptor, i.e. V\(hySeries
TE2s.
.bp
.sp 1P
.LP
1.2
\fIConnectivity\fR
.sp 9p
.RT
.PP
ISDN connectivity requirements include support for TE1\(hyto\(hyTE1,
TE2\(hyto\(hyTE2 (TA\(hyto\(hyTA) and TE1\(hyto\(hyTE2 (TE1\(hyto\(hyTA)
connections as discussed and illustrated in Figure\ 1/V.120. This document
specifies a terminal adaption
protocol based on a modification of LAPD that supports these connections.
LAPD is specified in CCITT Recommendation\ Q.921. The modifications are
specified in \(sc\ 2.4 of this Recommendation.
.PP
This protocol provides a consistent protocol for carrying
different types of data streams (see \(sc\(sc\ 3.3 to\ 3.5). This approach
using a HDLC based protocol provides the capability for multiplexing multiple
logical
circuits on a channel. This also allows for different higher layer protocols
to be running concurrently on a single channel (see\ \(sc\ 2.2).
.PP
In come cases the speed of the communicating TE2s is the same. It is possible
in certain cases to connect devices with different speeds using the
frame encapsulation procedures described later in \(sc\ 2, and in more
detail in
\(sc\ 3. The key factors that make this concept viable are TA buffering,
TA flow
control, HDLC encapsulation and HDLC flow control.
.PP
The application of this protocol to TE1\(hyto\(hyTA applications is
discussed in Appendix\ I.
.PP
Within I.515, parameter exchange procedureds are \fIgenerally described\fR
to allow interworking between incompatible terminal adaptors (TAs) that
may not require interworking functions within the network. Interworking
between
different types of TAs can be accomplished with Multifunctional Terminal
Adaptors (MTAs) that are capable of supporting more than one protocol.
However, Figure\ 1/I.515 also depicts other interworking scenarios that
will require IWFs when TAs are not capable of supporting more than one
protocol.
.RT
.LP
.rs
.sp 15P
.ad r
\fBFigure 1/V.120, p.\fR
.sp 1P
.RT
.ad b
.RT
.sp 2P
.LP
\fB2\fR \fBData transport protocol specification\fR
.sp 1P
.RT
.PP
This protocol relies on procedures similar to those in CCITT\ 1986 Recommendation\
Q.921/I.441. It provides the capability for use with compatible TE1 or
TA equipments.
.PP
The use in TE1s of the protocols specified in this document is
described in Appendix\ I. The remainder of this document is concerned with
their use in TAs.
.RT
.sp 2P
.LP
2.1
\fIFunctions provided by protocol\fR
.sp 1P
.RT
.sp 1P
.LP
2.1.1
\fICategories of functions\fR
.sp 9p
.RT
.PP
There are two categories of functions provided by this specified
protocol. There is a set of base functions and a set of additional functions.
The additional functions depend upon the type of data flow (character coded
or message).
.bp
.RT
.sp 1P
.LP
2.1.2
\fIBase functions\fR
.sp 9p
.RT
.PP
The base functions of the protocol include the following:
.RT
.LP
\(em
transparent transport of data;
.LP
\(em
generation and interpretation of messages for peer
communication (i.e.\ post call connection hand
shake);
.LP
\(em
administration of timers and counters used in communication;
.LP
\(em
error detection.
.sp 1P
.LP
2.1.3
\fIAdditional functions\fR
.sp 9p
.RT
.PP
The additional functions of the protocol include the
following:
.RT
.LP
\(em
transport and interpretation of interface status change at
the R reference point;
.LP
\(em
segmenting and reassembly of messages;
.LP
\(em
transport of detected interface errors at the R reference
point;
.LP
\(em
support for operation with a network independent clock;
.LP
\(em
multiplexing of synchronous and asynchronous protocols;
.LP
\(em
interworking of two TEs operating at different data rates;
.LP
\(em
flow control;
.LP
\(em
retransmission on error detection.
.sp 1P
.LP
2.2
\fIGeneral\fR
\fIterminal adaption\fR
.sp 9p
.RT
.PP
The terminal adaption mechanisms are divided into two general
categories:
.RT
.LP
\(em
protocol sensitive operation for character or message
encapsulation; and
.LP
\(em
bit transparent operation where no alignment (above the bit level) of
information from the interface at the R\ reference point is made
within the frame transport in the bearer channel.
.PP
The interface bit rate at the R reference point must be less than the bearer
channel capability. The terminal adaptor may support single or
multiple interfaces at the R\ reference point. In the later case the protocol
applies separately to the data streams associated with each interface.
The use of logical link identifiers to distinguish between data streams
will be
described.
.sp 1P
.LP
2.2.1
\fIProtocol sensitive operation with start/stop mode TE2s\fR
\fI(asynchronous mode)\fR
.sp 9p
.RT
.PP
The start and stop bits are removed and parity may be checked (see \(sc\
3.3.1). The resultant character(s) is placed in a frame for transport on
the bearer channel to a peer entity. The peer entity may be in a peer TA
where the reverse process takes place to another interface at an R\ reference
point, or
the peer entity may be in a TE1 where the character(s) is passed to a higher
layer within the TE1, or in an interworking function. Errors detected on the
interface at the R\ reference point are relayed to the peer entity which
will:
.RT
.LP
1)
notify the higher layer of the detected error; or
.LP
2)
replicate the error (see \(sc\(sc 3.3.1 and 3.3.2) at the
outbound interface at the R\ reference point.
.PP
The terminal adaptor will recognize and remove any erroneous NULL characters
(created by the initiation of BREAK) before transmission.
.sp 1P
.LP
2.2.2
\fIProtocol sensitive operation with synchronous HDLC TE2s\fR
\fI(synchronous mode)\fR
.sp 9p
.RT
.PP
The flags and zero bit insertion are removed and the FCS is checked and
removed but the address, control, and information fields flow transparently
through the TA. The resultant octet\(hyaligned message is placed in one
or more
frames for transport to a peer entity over the data link connection on the
bearer channel. The original message from the interface at the R\ reference
point may be segmented within the TA and forwarded in parts to the peer
entity. This segmenting and forwarding process may occur as the message
is received.
This avoids the delays associated with accumulating a full message. The peer
entity performs the reverse process at the peer interface R\ reference point.
.bp
.PP
If an FCS error is detected at the interface at the R reference point,
this is relayed to the peer entity which will either:
.RT
.LP
1)
discard the entire message; or
.LP
2)
cause an abort to be sent on the interface at the R
reference point in the message which is in progress; or
.LP
3)
generate an incorrect FCS in the message which is in
progress.
.PP
\fINote\fR \ \(em\ Support of non\(hyoctet aligned messages is for further
study.
.sp 1P
.LP
2.2.3
\fITransport operation (bit transparent mode)\fR
.sp 9p
.RT
.PP
In bit transparent operation the TA will encapsulate the bits from the
interface at the R\ reference point into frames as they are received. These
frames are forwarded to a peer entity. The peer TA removes the bits from
the
frames and sends them on the interface at the R\ reference point. No processing
or modification of the bits is performed and there is no checking fot bit
stream errors on the interface at the R\ reference point. This mode is
used for all modes not covered by the asynchronous or synchronous modes
defined above.
.PP
\fINote\fR \ \(em\ In many cases UI frames will be used to convey frames
in this mode.
.RT
.sp 1P
.LP
2.3
\fIGeneral messages and formats\fR
.sp 9p
.RT
.PP
The frame structure used is that specified in
Recommendation\ Q.921/I.441. There is an optional one or two octet header.
The header octet(s), when present, directly follows the control field of
the V.120 frame as shown in Figure\ 2/V.120.
.RT
.LP
.rs
.sp 26P
.ad r
\fBFigure 2/V.120, p.\fR
.sp 1P
.RT
.ad b
.RT
.LP
.bp
.sp 1P
.LP
2.3.1
\fIAddress field\fR
.sp 9p
.RT
.PP
The format of the V.120 address field in Figure 2/V.120 is similar to that
specified in Recommendation\ Q.921/I.441. The LLI0 and LLI1 fields may
be viewed as a single 13\ bit logical link identifier (LLI) field or
alternatively as two separate fields. This is shown in Figure\ 3/V.120.
.RT
.LP
.rs
.sp 15P
.ad r
\fBFigure 3/V.120 [T1.120], p.\fR
.sp 1P
.RT
.ad b
.RT
.PP
.sp 2
The LLI is considered to be the concatenation of the LLI0 field
with the LLI1 field. The LLI can take on values in the range\ 0\(hy8191.
Table\ 1/V.120 indicates values that are reserved.
.ce
\fBH.T. [T2.120]\fR
.ce
TABLE\ 1/V.120
.ce
\fBReserved LLI values\fR
.ps 9
.vs 11
.nr VS 11
.nr PS 9
.TS
center box;
cw(36p) | cw(120p) .
LLI Function
_
.T&
cw(36p) | lw(120p) .
0 In\(hychannel signalling
_
.T&
cw(36p) | lw(120p) .
1\(hy255 T{
Reserved for future standardization
T}
_
.T&
cw(36p) | lw(120p) .
256 Default LLI
_
.T&
cw(36p) | lw(120p) .
257\(hy2047 For LLI assignment
_
.T&
cw(36p) | lw(120p) .
2048\(hy8190 T{
Reserved for future standardization
T}
_
.T&
cw(36p) | lw(120p) .
8191 T{
In\(hychannel layer management
T}
_
.TE
.nr PS 9
.RT
.ad r
\fBTableau 1/V.120 [T2.120], p.\fR
.sp 1P
.RT
.ad b
.RT
.LP
.bp
.sp 1P
.LP
2.3.2
\fIAddress extension bit (EA)\fR
.sp 9p
.RT
.PP
The address field range is extended by using bit 1, the first
transmitted bit, of the address field octets to indicate the final octet
of the address field. The presence of a \*Q1\*U in bit\ 1 of an address
field octet signals that it is the final octet of the address field.
.RT
.sp 1P
.LP
2.3.3
\fIC/R bit\fR
.sp 9p
.RT
.PP
The C/R bit identifies a V.120 frame as either a command or a
response (see \(sc\ 2.4). The C/R\ bit is employed symmetrically for the two
directions of transmission and is coded as shown in Table\ 2/V.120.
.RT
.LP
.ce
\fBH.T. [T3.120]\fR
.ce
TABLE\ 2/V.120
.ce
\fBCoding of C/R bit\fR
.ps 9
.vs 11
.nr VS 11
.nr PS 9
.TS
center box;
cw(18p) | cw(60p) .
C/R Meaning
_
.T&
cw(18p) | lw(60p) .
0 Command
_
.T&
cw(18p) | lw(60p) .
1 Response
_
.TE
.nr PS 9
.RT
.ad r
\fBTable 2/V.120 [T3.120], p.\fR
.sp 1P
.RT
.ad b
.RT
.sp 1P
.LP
.sp 2
2.3.4
\fIControl field\fR
.sp 9p
.RT
.PP
The use of the V.120 control field is described in \(sc 2.4.
.RT
.sp 1P
.LP
2.3.5
\fIHeader octet\fR
.sp 9p
.RT
.PP
The format of the header octet is shown in Figure 4/V.120 (see
\(sc\(sc\ 3.3 to 3.5 for details on the use of these fields). The header
octet is
mandatory for protocol sensitive modes and is optional for bit transparent
mode.
.RT
.LP
.rs
.sp 12P
.ad r
\fBFigure 4/V.120 [T4.120], p.\fR
.sp 1P
.RT
.ad b
.RT
.LP
.bp
.sp 1P
.LP
2.3.5.1
\fIE\(hyextension bit\fR \fI(bit 8)\fR
.sp 9p
.RT
.PP
The E bit is the header extension bit. It allows for extension of the header
to provide additional control state information. A \*Q0\*U\ bit indicates
that a control state information octet follows (see \(sc\ 2.3.6).
.RT
.sp 1P
.LP
2.3.5.2
\fIBR\(hybreak/HDLC idle bit\fR \fI(bit 7)\fR
.sp 9p
.RT
.PP
In asynchronous applications, the break bit indicates the
invocation of the BREAK function by the TE2. A \*Q1\*U in this bit position
indicates BREAK (see \(sc\ 3.3).
.PP
In protocol sensitive operation for synchronous HDLC applications, the
BR\ bit is used to indicate an HDLC idle condition on the interface at
the
R\ reference point. A \*Q1\*U in this bit position indicates that the interface
at the R\ reference point is receiving HDLC idle condition (see \(sc\ 3.4).
.RT
.sp 1P
.LP
2.3.5.3
\fIBits 5 and 6\fR
.sp 9p
.RT
.PP
Bit 5 and bit 6 of the header octet are reserved and set to
\*Q0\*U.
.RT
.sp 1P
.LP
2.3.5.4
\fIC1, C2\(hyerror control (bits 3 and 4)\fR
.sp 9p
.RT
.PP
Bit 3 and bit 4 of the header octet are defined as Control 1 and
Control 2 respectively and are used for TA error detection and transmission.
.PP
The meanings of the C1 and C2 bits are encoded as shown in
Table\ 3/V.120.
.RT
.ce
\fBH.T. [T5.120]\fR
.ce
TABLE\ 3/V.120
.ce
\fBCoding of C1 and C2 bits\fR
.ps 9
.vs 11
.nr VS 11
.nr PS 9
.TS
center box;
cw(12p) | cw(12p) | cw(60p) sw(60p) sw(60p) , ^ | ^ | c | c | c.
C1 C2 Meaning
Synchronous Asynchronous mode Bit transparent mode
_
.T&
cw(12p) | cw(12p) | lw(60p) | lw(60p) | lw(60p) .
0 0 No error detected No error detected No error detected
_
.T&
cw(12p) | cw(12p) | lw(60p) | lw(60p) | lw(60p) .
0 1 FCS error (interface at R) Stop\(hybit error Not applicable
_
.T&
cw(12p) | cw(12p) | lw(60p) | lw(60p) | lw(60p) .
1 0 Abort T{
Parity error on the last character in frame
T} Not applicable
_
.T&
cw(12p) | cw(12p) | lw(60p) | lw(60p) | lw(60p) .
1 1 T{
TA overrun (from interface at the R reference point)
T} T{
Both stop\(hybit and parity error
T} Not applicable
_
.TE
.nr PS 9
.RT
.ad r
\fBTable 3/V.120 [T5.120], p.\fR
.sp 1P
.RT
.ad b
.RT
.sp 1P
.LP
.sp 1
2.3.5.5
\fIB, F\(hysegmentation bits\fR \fI(bit 2 and bit 1)\fR
.sp 9p
.RT
.PP
The B and F bits are used for segmenting and reassembly of messages in
synchronous mode applications. Setting the B\ bit to\ \*Q1\*U indicates
that the frame contains an information portion beginning a message. Setting
the F\ bit
to\ \*Q1\*U indicates the frame contains the final portion of the message.
If the
entire message is contained within a single frame then both B and F\ bits
will be set to\ \*Q1\*U. A frame which is neither first nor last is termed
a middle
frame. For the asynchronous mode and the bit transparent mode these bits are
set to\ \*Q1\*U.
.bp
.RT
.ce
\fBH.T. [T6.120]\fR
.ce
TABLE\ 4/V.120
.ce
\fBCoding of B and F bits\fR
.ps 9
.vs 11
.nr VS 11
.nr PS 9
.TS
center box;
cw(12p) | cw(12p) | cw(60p) | cw(60p) | cw(60p) .
B F Synchronous Asynchronous Bit transparent
_
.T&
cw(12p) | cw(12p) | lw(60p) | lw(60p) | lw(60p) .
1 0 Begin frame Not applicable Not applicable
_
.T&
cw(12p) | cw(12p) | lw(60p) | lw(60p) | lw(60p) .
0 0 Middle frame Not applicable Not applicable
_
.T&
cw(12p) | cw(12p) | lw(60p) | lw(60p) | lw(60p) .
0 1 Final frame Not applicable Not applicable
_
.T&
cw(12p) | cw(12p) | lw(60p) | lw(60p) | lw(60p) .
1 1 Single frame Required Required
_
.TE
.nr PS 9
.RT
.ad r
\fBTable 4/V.120 [T6.120], p.\fR
.sp 1P
.RT
.ad b
.RT
.LP
.sp 1
.sp 1P
.LP
2.3.6
\fIControl state information\fR
.sp 9p
.RT
.PP
The control state information is contained in the second octet of the header
when present. In general, for TAs, this field serves as a physical status/interface
control field for the interface at the R\ reference point.
Control state information may be sent whenever one of the mapped control
leads changes, although the TA should be able to accept the CS octet anytime
the
H\ field is present. Figure\ 5/V.120 shows the format of the control state
information octet. For an example of the mapping of the V.24 leads, see
Annex\ A. See \(sc\ 2.6 for the procedures and see \(sc\ 3.2.1 for the
use of the RR\ bit for flow control.
.RT
.LP
.rs
.sp 12P
.ad r
\fBFigure 5/V.120 [T7.120], p.\fR
.sp 1P
.RT
.ad b
.RT
.sp 1P
.LP
.sp 1
2.3.6.1
\fIE\(hyextension bit (bit 8)\fR
.sp 9p
.RT
.PP
The extension bit allows for further extension of the header
octets. The E\ bit set to\ \*Q1\*U to indicate no further extension of the
header.
.RT
.sp 1P
.LP
2.3.6.2
\fIDR \(em data ready (bit 7)\fR
.sp 9p
.RT
.PP
This bit set to \*Q1\*U indicates that the interface at the R reference
point is activated. For TE1 it implies the terminal interface is
activated.
.bp
.RT
.sp 1P
.LP
2.3.6.3
\fISR \(em send ready (bit 6)\fR
.sp 9p
.RT
.PP
This bit set to \*Q1\*U indicates that the TE is ready to send
data.
.RT
.sp 1P
.LP
2.3.6.4
\fIRR \(em receive ready (bit 5)\fR
.sp 9p
.RT
.PP
This bit set to \*Q1\*U indicates that the TE is ready to receive
data.
.RT
.sp 1P
.LP
2.3.6.5
\fIBits 4, 3, 2, 1\fR
.sp 9p
.RT
.PP
Bits 4, 3, 2 and 1 of the control state information octet are
reserved and set to\ \*Q0\*U.
.RT
.sp 1P
.LP
2.3.7
\fIInterframe time fill\fR
.sp 9p
.RT
.PP
Interframe time fill should normally be HDLC flags. For special
applications it may be all ones.
.RT
.sp 1P
.LP
2.4
\fIElements of procedure and procedures\fR
.sp 9p
.RT
.PP
Two types of logical connections are available using the procedures described
in this specification, namely:
.RT
.LP
1)
support of unacknowledged information transfer only (see
\(sc\ 5.2 of Recommendation\ Q.921);
.LP
2)
support of both multiple frame acknowledged information
transfer and unacknowledged information transfer (see \(sc\ 5.5 of
Recommendation\ Q.921).
.PP
For either type, the elements of procedure and procedures are as specified
in \(sc\(sc\ 3 and\ 5 of Recommendation\ Q.921, with the following
differences:
.LP
\(em
C/R bit symmetry;
.LP
\(em
receipt of I frame response;
.LP
\(em
transmission of FRMR response;
.LP
\(em
no TE1 management procedures;
.LP
\(em
management of address field LLI.
.PP
These differences are detailed below.
.sp 1P
.LP
2.4.1
\fIC/R bit symmetry\fR
.sp 9p
.RT
.PP
The use of the C/R bit is symmetric as described in \(sc 2.3.3.
.RT
.sp 1P
.LP
2.4.2
\fIReceipt of I frame response\fR
.sp 9p
.RT
.PP
During multiple frame acknowledged information transfer operation, I frames
sent as either commands or responses shall be received. I\ frame
responses are optional to send.
.PP
\fIQ.921 variable description\fR
.RT
.LP
N(S)
Send sequence number
.LP
N(R)
Receive sequence number
.LP
V(R)
Next expected received N(S)
.PP
When a data link layer entity receives a valid I frame command
whose N(S) is equal to the current V(R) and whose N(R) is in the proper
range, it shall follow the procedures stated in \(sc\(sc\ 5.6.2 and\ 5.6.6
of
Recommendation\ Q.921.
.PP
When a data link layer entity that is not in a timer recovery state
receives a valid I\ frame response with F\ bit set to\ \*Q0\*U with its
N(S) equal to the current V(R) and whose N(R) is in the proper range, it
shall treat the
frame as a valid I\ frame command with P\ bit set to\ \*Q0\*U and follow the
procedures stated in \(sc\(sc\ 5.6.2 and\ 5.6.6 of Recommendation\ Q.921.
If the
received I\ frame response has its F\ bit set to\ \*Q1\*U, the data link
layer entity shall indicate an error to the connection management entity.
.PP
When a data link layer entity is in a timer recovery condition and
receives a valid I\ frame response with F\ bit set to\ \*Q0\*U with its
N(S) equal to the current V(R) and whose N(R) is in the proper range, it
shall treat the
frame as a valid I\ frame command with P\ bit set to\ \*Q0\*U and follow the
procedures stated in \(sc\(sc\ 5.6.2 and\ 5.6.6 of Recommendation\ Q.921.
.bp
.PP
When a data link layer entity is in a timer recovery condition and
receives a valid I\ frame response with F\ bit set to\ \*Q0\*U with its
N(R) in the
proper range, it shall clear the timer recovery condition and reset timer\
T200 as if it had received a supervisory frame response with F\ bit set
to\ \*Q1\*U, as
described in \(sc\ 5.6.7 of Recommendation\ Q.921. If the I\ frame has
N(S) equal to the current V(R), it is then processed as if it were an I\
frame command with
P\ bit set to\ \*Q0\*U, following the procedures stated in \(sc\(sc\ 5.6.2
and\ 5.6.6 of
Recommendation\ Q.921. If the I\ frame has N(S) not equal to the current V(R),
the data link layer entity shall transmit a REJ command prior to resumption
of transmission or retransmission of I\ frames and enter the REJ exception
condition as described in \(sc\ 5.8.1 of Recommendation\ Q.921.
.RT
.sp 1P
.LP
2.4.3
\fITransmission of FRMR response\fR
.sp 9p
.RT
.PP
A frame rejection condition results from one of the
following:
.RT
.LP
1)
the receipt of a supervisory or unnumbered frame with
incorrect length;
.LP
2)
the receipt of an invalid N(R);
.LP
3)
the receipt of an I frame with an information field which
exceeds the maximum allowed length; or
.LP
4)
the receipt of a command or response control field that is undefined
or not implemented.
.PP
Upon occurrence of a frame rejection condition, the data link
layer entity shall:
.LP
\(em
transmit a FRMR response with F bit set to the value of the P bit in
the rejected frame;
.LP
\(em
indicate an error to the connection management entity; and
.LP
\(em
enter the \*Qmultiframe not established\*U state. The \*Qmultiframe not
established\*U state is essentially equivalent to the \*QTE1 assigned\*U
state
described in Recommendation\ Q.921. It is the state initially entered by the
data link layer entity when the logical connection establishment procedure
is completed successfully.
.PP
The format and coding of the FRMR response is as shown in
Table\ 5/Q.921 and Figure\ 6/Q.921.
.sp 1P
.LP
2.4.4
\fINo TE1 management procedures\fR
.sp 9p
.RT
.PP
The TE1 has no counterpart and the associated Recommendation\ Q.921 procedures
for TE1 management do not apply.
.RT
.sp 1P
.LP
2.4.5
\fIManagement of address field LLI\fR
.sp 9p
.RT
.PP
The address field is managed using the procedures of \(sc\ 4.3.
.RT
.sp 1P
.LP
2.5
\fIData field length\fR
.sp 9p
.RT
.PP
The maximum number of octets in a data field (N2xx) is a system
parameter. Its value must be less than or equal to N201 (see
Recommendation\ Q.921) minus the length of the header.
.RT
.sp 1P
.LP
2.6
\fIControl state information processing\fR
.sp 9p
.RT
.PP
This section describes the use of the control state variables and the processing
of the control state information field, when present, defined in \(sc\
2.3.6. Use of the control state information field is optional (see octet\
5b, bit\ 7 of low layer compatibility, \(sc\ 4.4.5).
.PP
The terminal adaption entity maintains six control state variables
that indicate the current state of the DR, SR and RR indicators as
follows:
.RT
.LP
\(em
send variables DR(S), SR(S) and RR(S) \(em equal to the current local
states of DR, SR and RR, respectively, as transmitted to the far end peer
entity;
.LP
\(em
receive variables DR(R), SR(R) and RR(R) \(em equal to the
current states of DR, SR and RR, respectively, in the peer entity as received
from it.
.sp 1P
.LP
2.6.1
\fIControl state information initialization\fR
.sp 9p
.RT
.PP
Whenever the protocol is initialized to start communications, the protocol
entity will set the receive variables (DR(R), SR(R) and RR(R)) to\ \*Q0\*U
and the send state variables to reflect the status of the interface at
the
R\ reference point.
.bp
.RT
.sp 1P
.LP
2.6.2
\fISending a control state information field\fR
.sp 9p
.RT
.PP
A control state information field will be sent whenever a send
control state variable changes. A send control state variable will change
with a change to the interface at the R\ reference point or a change to
a receive
control state variable. The control state information held will be sent
following any queued data for interface at the S/T reference point. The
control state information field is sent in the last frame containing data
received
across the interface at the R\ reference point prior to the control state
variable change, or in a separate frame.
.PP
The contents of the control state information octet is set to the
state of the corresponding send control state variables. DR is set to DR(S),
SR is set to SR(S) and RR to RR(S).
.RT
.sp 1P
.LP
2.6.3
\fIReceiving a control state information field\fR
.sp 9p
.RT
.PP
Upon receipt of a control state information field, the control
field is checked with the receive control state variables: DR to DR(R),
SR to SR(R) and RR to RR(R). The receive control state variables are set
to their
received values.
.PP
If SR(R) was \*Q0\*U and the SR bit in the received control state
information field is \*Q1\*U, then the interface at the R\ reference point
and the RR(S) state are changed.
.PP
If SR(R) was \*Q1\*U and the SR bit in the received control state
information field is \*Q0\*U, then the interface at the R\ reference point
and the RR(S) state are changed, consistent with one of the following:
.RT
.LP
\(em
if received data (from peer entity) does not remain to be
forwarded (no message in progress), then the control actions can occur
immediately;
.LP
\(em
if received data (from peer entity) is incomplete (e.g. in
protocol sensitive mode the final frame was not received), then the incomplete
message is forwarded (continued) until completion on the interface at the
R\ reference point, at which time the control actions can occur;
.LP
\(em
if received data (for peer entity) is complete, then the
received data is forwarded until completion on the interface at the R\
reference point, at which time the control actions can occur.
.PP
If RR(R) and the RR bit in the received control state information field
are not the same, then the interface at the R\ reference point is
changed.
.PP
If DR(R) was \*Q0\*U and the DR bit in the received control state
information field is \*Q1\*U, then the interface at the R\ reference point is
changed.
.PP
If DR(R) was \*Q1\*U and the DR bit in the received control state
information field is \*Q0\*U, then the interface at the R\ reference point is
changed consistent with the following:
.RT
.LP
\(em
if the received message from the peer entity is incomplete, it is discarded;
.LP
\(em
if the received message from the peer entity is a complete, message,
then it should be forwarded to the interface at the R\ reference point
until completetion prior to the control actions taking place.
.sp 1P
.LP
2.7
\fIParameter negotiation\fR
.sp 9p
.RT
.PP
Parameter negotiation during the bearer channel establishment is in accordance
with the procedures described in CCITT Recommendation\ Q.931. During logical
link negotiation, a specific value for a parameter may be requested by
including the low layer compatibility information element containing the
desired parameters in the SETUP message. The receiving TA may accept the
requested parameter values by responding with a CONNect message. If the
receiving TA does not accept the parameter values included in the SETUP
message, it may negotiate by including the desired values in a low layer
compatibility information element in the CONNect message. The originating TA
may refuse the parameters receiving in the connect message by initiating
clearing with the cause number\ 21 \*QCall Rejected\*U.
.RT
.sp 2P
.LP
\fB3\fR \fBTerminal adaptor (TA) functions\fR
.sp 1P
.RT
.sp 1P
.LP
3.1
\fIClock synchronization\fR
.sp 9p
.RT
.PP
The specific mechanisms for providing clock synchronization is
implementation dependent. See Appendix\ II for a discussion.
.bp
.RT
.sp 1P
.LP
3.2
\fIData flow control and buffering\fR
.sp 9p
.RT
.PP
Once a frame is assembled (from the interface at the R reference
point), it is sent on the interface at the S/T reference point at the nearest
opportunity. V.120 procedures may control the flow of frames to the interface
at the S/T reference point. The handling of overflow conditions will be
described below in the appropriate sections on each mode of operation.
.RT
.sp 1P
.LP
3.2.1
\fIAsynchronous mode\fR
.sp 9p
.RT
.PP
In the asynchronous mode, upon the TA receiving a frame from the
interface at the S/T reference point, the characters will be sent to the
interface at the R\ reference point at the earliest opportunity. In the
asynchronous mode under\(hyrun is not a problem, only the over\(hyrun condition
is of concern. When all buffers are full, the TA flow controls the sender
by not
acknowledging until a buffer becomes available, when operating in multiple
frame acknowledged mode, or using the RR\ bit in the control state information
octet, if available, when operating in unacknowledged mode.
.PP
Flow control is indicated when a control state information field with the
R\ bit set to\ \*Q0\*U is received. The flow control condition is removed
when a flow controlled TA receives a control state information field with
the RR\ bit set to\ \*Q1\*U. A TA may indicate a change in the state of
the RR control state
variable by sending UI\ frames with zero length V.110 information fields
containing the control state information field even when it is flow controlled
by the other TA.
.PP
\fINote\fR \ \(em\ Some asynchronous terminals may use local flow control.
.RT
.sp 1P
.LP
3.2.2
\fISynchronous mode\fR
.sp 9p
.RT
.PP
In the synchronous mode, a possible under\(hyrun condition exists as well
as the over\(hyrun. Adequate buffering should be provided to normally prevent
under\(hyrunning the interface at the R\ reference point.
.PP
If under\(hyrun towards the interface at the R reference point occurs,
the current message will be treated by sending an abort or forcing an FCS
error.
.PP
If an over\(hyrun occurs on buffers toward the interface at the S/T
reference point a frame will be sent across the interface at the S/T reference
point indicating \*Qfinal\*U and having the C1 and C2 bits set to\ \*Q1\*U
following any messages completely received from the interface at the R\
reference point.
Additional data received from the interface at the R\ reference point will be
discarded until the start of a new message is detected.
.RT
.sp 1P
.LP
3.2.3
\fIBit transparent mode\fR
.sp 9p
.RT
.PP
In the bit transparent mode, either under\(hyrun or over\(hyrun may
occur. In this mode the TE2s must operate at the same data rate. Adequate
buffering should be provided to minimize under\(hyrunning the interface at the
R\ reference point.
.PP
When the buffers are empty, the interface at the R reference point
will be set to the mark hold condition.
.PP
If the buffer to the interface at the S/T reference point over\(hyflows,
the buffer pool will be set to empty state and accumulation of data
restarted.
.RT
.sp 2P
.LP
3.3
\fIAsynchronous mode operation\fR
.sp 1P
.RT
.sp 1P
.LP
3.3.1
\fICharacter processing \(em TE2 to S/T direction\fR
.sp 9p
.RT
.PP
The following processing will be performed on start/stop data
received from the TE2:
.RT
.LP
1)
the start and stop bits will be removed from each
character;
.LP
2)
the remaining bit in the character may be checked for
correct parity;
.LP
3)
the parity bit will be removed if the code being used is an 8\(hybit
code; otherwise passed as part of the octet;
.LP
4)
codes using less than 8 bits (including parity) are padded in the high
order bits.
.PP
The resulting data is placed in frames, with the segment bits
indicating single segment and set to\ \*Q1\*U.
.PP
Frames may be sent based on a timer, after a certain frame size, after
a carriage return,\ etc. However, the forwarding mechanism used is an
implementation issue and may vary.
.bp
.PP
If a BREAK is detected by the TA on the interface at the R reference point,
a frame with the BR\ bit set in the Header will be transmitted in the
same frame or after all queued characters have been sent. The C1 and C2\ bits
should be set to\ \*Q0\*U.
.PP
If a parity error is detected on a character of data being received
from the TE2, the C1\ bit is set to\ \*Q1\*U and the frame sent following
any frames already queued for transmission. Thus, setting of the C1\ bit
to\ \*Q1\*U indicates that the last character in the frame in which the
C1\ bit is set to\ \*Q1\*U was
received by the TA with a parity error. If a stop bit error is detected on a
character of data being received from the TE2, the C2\ bit is set to\ \*Q1\*U
and the frame sent following any frames already queued for transmission.
Thus, setting of the C2\ bit to\ \*Q1\*U indicates that a stop bit error
was detected by the TA
immediately following the last character contained in the frame in which the
C2\ bit is set to\ \*Q1\*U.
.RT
.sp 1P
.LP
3.3.2
\fICharacter processing \(em S/T to TE2 direction\fR
.sp 9p
.RT
.PP
The TA will perform the following processing on the data received from
the interface at the S/T reference point:
.RT
.LP
1)
if the asynchronous character is less than 8 data bits, the characters
will be sent to the TE2 as is;
.LP
2)
if the asynchronous character contains 8 data bits, each
character will be sent to the TE2 with the appropriate parity bit appended;
.LP
3)
if the C2 bit is set to \*Q1\*U indicating a stop bit error, the TA action
is not defined;
.LP
4)
if the C1 bit is set to \*Q1\*U and the asynchronous character contains
8\ data bits, indicating a parity error, then the TA may force a parity
error on the last character sent to the TE2;
.LP
5)
if the BREAK bit is set to \*Q1\*U, then the TA will send BREAK to the
TE2 following all characters received prior to the break;
.LP
6)
start and stop bits will be appended to the characters as
required.
.sp 2P
.LP
3.4
\fISynchronous mode operation\fR
.sp 1P
.RT
.sp 1P
.LP
3.4.1
\fIMessage processing \(em TE2 to S/T direction\fR
.sp 9p
.RT
.PP
The following processing will be performed on the HDLC frame
received from the TE2:
.RT
.LP
1)
the beginning flag(s) will be removed;
.LP
2)
all inserted zeros will be removed;
.LP
3)
FCS will be accumulated until a flag is detected. The
polynomial G(X)\ =\ X**16\ + X**12\ + X**\ 5\ +\ 1 will be used for the FCS
accumulation. The accumulated FCS will be compared with the FCS received
from the TE2;
.LP
4)
the FCS character received from the TE2 will be removed in all cases
except for when UI\ frames are used to carry HDLC frames, in which
case the FCS of the original HDLC frame is also carried as data;
.LP
5)
the ending flag will be removed.
.PP
The resulting data will be segmented, if necessary, with each
segment preceded by the header. Segmentation shall be such that no frame
transmitted on the interface at the S/T reference point is longer than N201
octets.
.PP
If only one segment is required, the header will indicate both
beginning segment and final segment in the \*QB\*U\ bit and the \*QF\*U\
bit. If more
than one segment is required, the header of the first segment will indicate
\*Qbegin\*U segment and the last segment of the message will indicate \*Qfinal\*U
segment. All intermediate segments will have both \*Qbegin\*U and \*Qfinal\*U
segment indicators set to\ \*Q0\*U.
.PP
The C1 and C2 bits will be set as follows in the final or only segment
to indicate detected error conditions:
.RT
.LP
\(em
if an FCS error is detected as a result of the FCS
accumulation process described in step\ 3 above, then the C2\ bit will be set
to\ \*Q1\*U with the C1\ bit set to\ \*Q0\*U;
.LP
\(em
if an abort sequence is detected on the interface at the
R\ reference point, then the C1\ bit will be set to\ \*Q1\*U with the C2\
bit set to
\*Q0\*U;
.LP
\(em
if an over\(hyrun occurs on buffers toward the interface at the S/T reference
point, as described above in \(sc\ 3.2.2, then both the C1 and
C2\ bits will be set to\ \*Q1\*U.
.PP
When the TA first detects an HDLC idle condition on the interface at the
R\ reference point, it will transmit a frame with the BR\ bit in the
header set to\ \*Q1\*U following any queued data frames.
.bp
.sp 1P
.LP
3.4.2
\fIMessage processing \(em S/T to TE2 direction\fR
.sp 9p
.RT
.PP
The TA will perform the following processing on the data
received:
.RT
.LP
1)
The header will be checked as follows:
.LP
a)
if the \*Qbegin\*U segment bit is \*Q1\*U and the previous
segment did not have the \*Qfinal\*U segment bit set to\ \*Q1\*U, then
the previous
message will be terminated with an ABORT sequence;
.LP
b)
if the \*Qbegin\*U segment bit is \*Q0\*U and there is no
message currently in process, the segment will be discarded;
.LP
c)
if the C1 and C2 error bit is \*Q1\*U with the \*Qfinal\*U bit a \*Q1\*U,
an ABORT sequence will be sent to the TE2 instead of the FCS
characters.
.LP
2)
The FCS is recalculated for TA reconstructed messages when transmitted
at the interface at the R\ reference point except in the case where UI\
frames are used to carry HDLC frames. In this case the FCS of the original
HDLC frame is used in the reconstructed frame. The TA has the option of
examining the original FCS, which has been passed to it in the data stream
and taking appropriate action.
.PP
If an under\(hyrun occurs toward the interface at the R reference
point, then the frame being sent to the TE2 shall be treated as described in
\(sc\ 3.2.2.
.PP
If the BR bit is \*Q1\*U, then the TA will set an HDLC idle condition on
the interface at the R\ reference point following data queued for transmission.
The HDLC idle condition will be maintained until a frame is received with
its BR\ bit set to\ \*Q0\*U.
.RT
.sp 1P
.LP
3.5
\fIBit transparent mode operation\fR
.sp 9p
.RT
.PP
The TA breaks synchronous data stream into fixed size frames and
sends it over the channel as it is received from the TE2. The TA takes data
from frames received and sends it to the TE2.
.PP
The terminal adaption header must be used in bit transparent mode if it
is necessary to transmit the control state information. When the terminal
adaption header is used in this mode C1 and C2\ bits must both be set to\
\*Q0\*U (no error). B and F\ bits must both be set to\ \*Q1\*U and reserve
bits must be set
to\ \*Q0\*U.
.PP
If an under\(hyrun occurs toward the interference at the R reference
point, then the frame being sent to the TE2 shall be treated as described in
\(sc\ 3.2.3.
.PP
For unique applications, the contents of a frame with an FCS error may
be delivered across the interface at the R\ reference point.
.RT
.sp 2P
.LP
\fB4\fR \fBConnection control procedures\fR
.sp 1P
.RT
.PP
This section describes the procedures for establishing connections for
V.120 terminal adaption. Procedures are described for:
.RT
.LP
\(em
establishment of an ISDN circuit\(hyswitched connection; and
.LP
\(em
optional procedures for the negotiation of logical link
identifiers.
.PP
The protocol described in the following sections describing
procedures for negotiating logical links is based on Recommendation\ Q.931
messages, information elements and procedures, but is tailored for this
particular application. It is differentiated from the full Recommendation\
Q.931 procedures by the use of a unique protocol identifier (\*Q00001001\*U).
In addition to the information elements of Recommendation\ Q.931, an additional
information element is required to convey the logical link identifier for
this application and is defined in the following sections.
.PP
The selection of V.120 as a terminal adaption protocol at the
establishment of the bearer channel is specified by information in the
bearer capability information and/or low layer compatibility information
elements of the bearer channel SETUP procedure.
.PP
Logical link negotiation procedures may be carried out by means of
user information messages in a Recommendation\ Q.931 Call associated temporary
signalling connection on the ISDN D\ Channel, or by means of logical link
zero within the bearer channel using Recommendation\ Q.921 elements of
procedure
(i.e.\ either UI or I\ frames). The choice of methods is a terminal equipment
option and is partially determined by the availability of end\(hyto\(hyend ISDN
signalling capability. The optional establishment of logical links between
equipments that support different options may not be possible.
.bp
.RT
.sp 1P
.LP
4.1
\fIEstablishment of circuit\(hyswitched connection\fR
.sp 9p
.RT
.PP
The bearer channel between the TAs is controlled using the
D\ channel signalling procedure for call establishment is described in
Recommendation\ Q.931.
.PP
On the basis of call setup information, the network provides a bearer channel
to the requested end\(hypoint. The transfer mode and transfer capability
in the bearer capability (BC) information element of the setup message
is
coded as circuit, unrestricted or restricted.
.RT
.sp 1P
.LP
4.2
\fIEstablishment of logical links\fR
.sp 9p
.RT
.PP
This procedure requires that all TAs either be \*Qdefault assignees\*U
or \*Qassignor only\*U. The TAs that must always assign the LLI (e.g.,\
TAs with
pre\(hyassigned LLIs) are assignor only, all other TAs are default assignee. An
assignor/assignee field is provided in the low layer compatibility (LLC)
and bearer capability (BC) information elements for V.120. This field must
be coded as \*Q0\*U when the TA is a default assignee, and as \*Q1\*U when
the TA is an assignor only. The \*Qdefault assignee\*U may assume the role
of \*Qassignor only\*U during
negotiation.
.RT
.sp 1P
.LP
4.2.1
\fIDuring the bearer channel setup phase\fR
.sp 9p
.RT
.PP
The first logical link is established between the two TAs using the default
LLI\ =\ 256 using the information provided in the LLC information
element.
.RT
.sp 2P
.LP
4.2.2
\fIDuring the bearer channel active phase\fR
.sp 1P
.RT
.sp 1P
.LP
4.2.2.1
\fIResolving when both sides are default assignees\fR
.sp 9p
.RT
.PP
The first TA initiating a request for a logical link other than the default
will assume the assignee role. The TA that receives that request will assume
the assignor role.
.PP
If both TAs simultaneously send SETUP messages, the SETUP message
containing the larger \*Qcall reference\*U (see Recommendation\ Q.931 for
definition of call reference) is accepted and treated in accordance with
the above
procedure. The response to the SETUP message with the lower \*Qcall reference\*U
is a RELease COMPlete message. If both SETUP messages contain the same
\*Qcall
reference\*U, they are both cleared with RELease COMPlete messages, and
the TAs select different \*Qcall references\*U and try again.
.RT
.sp 1P
.LP
4.2.2.2
\fILLI assignee\fR
.sp 9p
.RT
.PP
If a TA is determined to be LLI assignee, it must set the
assignor/assignee field contained in any additional SETUP messages to zero.
.PP
The LLI assignee TAs request additional logical links by sending a
SETUP message without the LLI information element. The TA receiving this
SETUP message assigns an LLI by including the LLI information element in
the CONNect message.
.RT
.sp 1P
.LP
4.2.2.3
\fILLI assignor\fR
.sp 9p
.RT
.PP
If a TA is determined to be LLI assignor, it must set the
assignor/assignee field contained in any additional SETUP message to one.
.PP
The LLI assignor TAs set up additional logical links by sending SETUP messages
that include the LLI information element. The receiving TA responds
with a CONNect message and sets up a logical link using the information
provided in the SETUP message.
.RT
.sp 1P
.LP
4.3
\fIMessages used for logical connection control\fR
.sp 9p
.RT
.PP
The following messages are used for establishing logical links
within a bearer channel.
.RT
.LP
Call establishment
SETUP
.LP
CONNect
.LP
Call clearing
RELease
.LP
RELease COMPlete
.bp
.sp 1P
.LP
4.3.1
\fISetup\fR
.sp 9p
.RT
.PP
See Table 5/V.120.
.PP
This message is sent by either TA to indicate that it desires to
initiate a new logical link. It must contain protocol discriminator, call
reference, and message type. Low layer compatibility information element can
optionally be included in the SETUP message. Logical link identifier
information element must be included in the SETUP message if the TA is
assigning the LLI, and not included if requesting an LLI from the other
TA.
.RT
.ce
\fBH.T. [T8.120]\fR
.ce
TABLE\ 5/V.120
.ce
\fBSETUP message content\fR
.ps 9
.vs 11
.nr VS 11
.nr PS 9
.TS
center box;
cw(102p) | cw(42p) | cw(42p) | cw(42p) .
Information element Ref. V.120 Type Length
_
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Protocol discriminator 4.4.1 M 1
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Call Reference 4.4.3 M 2
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Message type 4.4.2 M 1
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Low layer compatibility 4.4.5 O (Note 1) 2\(hy13
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Logical link identifier 4.4.6 O (Note 2) 4
.TE
.LP
M\ Mandatory
O\ Optional
.LP
\fINote\ 1\fR
\ \(em\ Included when the calling user wants to pass low layer
compatibility information to the called user.
.LP
\fINote\ 2\fR
\ \(em\ Included if the calling user has the responsibility for assigning
LLI for that physical link.
.nr PS 9
.RT
.ad r
\fBTable 5/V.120 [T8.120], p.\fR
.sp 1P
.RT
.ad b
.RT
.sp 1P
.LP
4.3.2
\fICONNect\fR
.sp 9p
.RT
.PP
See Table 6/V.120.
.PP
This message is sent by the TA that has received a SETUP message to
indicate that the request for establishment of an additional logical link
has been accepted. It must include protocol discriminator, call reference,
and
message type information elements. The low layer compatibility information
element can optionally be included in the CONNect message. The logical link
identifier information element must be included if not included in the SETUP
message, and is not included otherwise.
.RT
.ce
\fBH.T. [T9.120]\fR
.ce
TABLE\ 6/V.120
.ce
\fBCONNect message content\fR
.ps 9
.vs 11
.nr VS 11
.nr PS 9
.TS
center box;
cw(102p) | cw(42p) | cw(42p) | cw(42p) .
Information element Ref. V.120 Type Length
_
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Protocol discriminator 4.4.1 M 1
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Call reference 4.4.3 M 2
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Message type 4.4.2 M 1
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Low layer compatibility 4.4.5 O (Note 1) 2\(hy13
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Logical link identifier 4.4.6 O (Note 2) 4
.TE
.LP
\fINote\ 1\fR
\ \(em\ Included to allow the called user to negotiate low layer
compatibility information with the calling user.
.LP
\fINote\ 2\fR
\ \(em\ Included if the called user has the responsibility for assigning
LLI.
.nr PS 9
.RT
.ad r
\fBTable 6/V.120 [T9.120], p.\fR
.sp 1P
.RT
.ad b
.RT
.LP
.bp
.sp 1P
.LP
4.3.3
\fIRELease\fR
.sp 9p
.RT
.PP
See Table 7/V.120.
.PP
The RELease message is used to indicate that the TA intends to release
the call reference and the logical link, and that the TA receiving this
message must release the logical link and prepare to release the call reference
after sending a RELease COMPlete. This message must contain protocol discriminator,
call reference message type, and optionally cause information elements.
.RT
.ce
\fBH.T. [T10.120]\fR
.ce
TABLE\ 7/V.120
.ce
\fBRELease message content\fR
.ps 9
.vs 11
.nr VS 11
.nr PS 9
.TS
center box;
cw(102p) | cw(42p) | cw(42p) | cw(42p) .
Information element Ref. V.120 Type Length
_
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Protocol discriminator 4.4.1 M 1
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Call reference 4.4.3 M 2
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Message type 4.4.2 M 1
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Cause 4.4.4 O 2\(hy4
_
.TE
.nr PS 9
.RT
.ad r
\fBTable 7/V.120 [T10.120], p.\fR
.sp 1P
.RT
.ad b
.RT
.sp 1P
.LP
.sp 1
4.3.4
\fIRELease COMPlete\fR
.sp 9p
.RT
.PP
See Table 8/V.120.
.PP
The RELease COMPlete message is sent to acknowledge that the TA
sending the message has released the logical link and call reference. This
message must contain protocol discriminator, call reference, and message
type and optionally cause information elements.
.RT
.ce
\fBH.T. [T11.120]\fR
.ce
TABLE\ 8/V.120
.ce
\fBRELease COMPlete message content\fR
.ps 9
.vs 11
.nr VS 11
.nr PS 9
.TS
center box;
cw(102p) | cw(42p) | cw(42p) | cw(42p) .
Information element Ref. V.120 Type Length
_
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Protocol discriminator 4.4.1 M 1
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Call reference 4.4.3 M 2
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Message type 4.4.2 M 1
.T&
lw(102p) | cw(42p) | cw(42p) | cw(42p) .
Cause 4.4.4 O 2\(hy4
_
.TE
.nr PS 9
.RT
.ad r
\fBTable 8/V.120 [T11.120], p.\fR
.sp 1P
.RT
.ad b
.RT
.sp 2P
.LP
.sp 1
4.4
\fIInformation elements\fR
.sp 1P
.RT
.sp 1P
.LP
4.4.1
\fIProtocol discriminator\fR
.sp 9p
.RT
.PP
The protocol discriminator is \*Q00001001\*U.
.RT
.sp 1P
.LP
4.4.2
\fIMessage type\fR
.sp 9p
.RT
.PP
Message types are identical to message types in
Recommendation\ Q.931.
.bp
.RT
.sp 1P
.LP
4.4.3
\fICall reference\fR
.sp 9p
.RT
.PP
The call reference field should be two octets in length.
.RT
.sp 1P
.LP
4.4.4
\fICause information element\fR
.sp 9p
.RT
.PP
See Figure 6/V.120.
.RT
.LP
.sp 1
.rs
.sp 19P
.ad r
\fBFigure 6/V.120 [T12.120] \ \
(\*`a traiter comme tableau), p.\fR
.sp 1P
.RT
.ad b
.RT
.sp 1P
.LP
.sp 5
4.4.5
\fILow layer compatibility information element\fR
.sp 9p
.RT
.PP
See Figure 7/V.120.
.RT
.sp 1P
.LP
4.4.6
\fILogical link identifier information element\fR
.sp 9p
.RT
.PP
The purpose of the logical link identifier information element is to identify
a logical link within the bearer channel. The default length of
this element is four octets. The logical link identifier information element
is coded as shown in Figure 8/V.120.
.RT
.sp 1P
.LP
4.5
\fILogical connection control procedures\fR
.sp 9p
.RT
.PP
This optional procedure defines the method for negotiation logical
links other than the default (LLI\ =\ 256). For setup and clearing of the
bearer channel, the procedure described in Recommendation\ Q.931 must be
followed.
.bp
.RT
.LP
.rs
.sp 47P
.ad r
\fBFigure 7/V.120 [1T13.120] \ \
(\*`a traiter comme tableau), p.15\fR
.sp 1P
.RT
.ad b
.RT
.LP
.bp
.LP
.rs
.sp 43P
.ad r
\fBFigure 7/V.120 [2T13.120] \ \
(\*`a traiter comme tableau), p.16\fR
.sp 1P
.RT
.ad b
.RT
.LP
.bp
.LP
.rs
.sp 4P
.ad r
Blanc
.ad b
.RT
.LP
.bp
.LP
.rs
.sp 17P
.ad r
\fBFigure 8/V.120 [T14.120] \ \
(\*`a traiter comme tableau), p.17\fR
.sp 1P
.RT
.ad b
.RT
.LP
.sp 1
.sp 1P
.LP
4.5.1
\fILogical link establishment\fR
.sp 9p
.RT
.PP
A logical link may be established by either TA by sending a SETUP message.
.PP
If the TA sending the SETUP message assigns the LLI, the SETUP message
must also include the assigned LLI value for the logical link.
.PP
If the TA does not assign the LLI, it must not include the LLI
information element in the SETUP message. In this case the LLI is assigned
by the receiving TA by including an LLI information element in the CONNect
message.
.PP
A TA may request a logical link by sending a SETUP message, setting
timer\ T303, and entering \*Qcall initiated\*U state.
.PP
If no response to the SETUP message is received before the first
expiry of timer\ T303, the SETUP message must be transmitted and timer\ T303
restarted. After the second expiry of timer\ T303, the \*QNull\*U state
is entered.
.PP
A TA receiving the SETUP message must send a CONNect message and enter
the \*QActive\*U state if able; otherwise, it must send a RELease COMPlete
message and enter the \*QNull' state.
.PP
When the initiating TA receives the CONNect message, it must stop
timer\ T303, and enter the \*QActive\*U state.
.RT
.sp 1P
.LP
4.5.2
\fILogical link clearing\fR
.sp 9p
.RT
.PP
Either TA may request to clear a logical link by sending a RELease message,
setting timer\ T308, and entering \*QRelease Request\*U state.
.PP
When a TA receives a RELease message, it must release the logical
link, send a RELease COMPlete message, release the call reference, and enter
the \*QNull\*U state.
.PP
When the TA initiating a RELease receives RELease COMPlete message, it
must stop timer\ T308, release the logical link, release the call reference,
and enter the \*QNull\*U state.
.PP
If the TA initiating the RELease does not receive a RELease COMPlete message
before the first expiry of timer\ T308, the RELease message must be
retransmitted and timer\ T308 restarted. If RELease COMPlete message is not
received before timer\ T308 expires for the second time, the TA must release
the call reference and enter the logical link into the \*QNull\*U state.
.PP
If both TAs simultaneously request to clear the same logical link by sending
RELease messages, both must stop timer\ T308, release the logical link,
release the call reference, and enter the \*QNull\*U state.
.bp
.RT
.ce 1000
ANNEX\ A
.ce 0
.sp 1P
.ce 1000
(to Recommendation V.120)
.sp 9p
.RT
.ce 0
.sp 1P
.ce 1000
\fBMappings of V.24 circuits to DR, SR, and RR\fR
.sp 1P
.RT
.ce 0
.PP
This Annex describes mapping of V.24 circuits intended to
provide proper operation with most DTEs.
.sp 1P
.RT
.sp 1P
.LP
A.1
\fIDR\(hydata ready (bit 7)\fR
.sp 9p
.RT
.PP
The DR bit maps according to DTE attachment as follows:
.RT
.LP
\(em
for sending DR\(hyDR(S) state variable:
.LP
\(em
indicates DTR\(hydata terminal ready (Recommendation V.24 circuit 108/2)
from DTE;
.LP
\(em
for receiving DR\(hyDR(R) state variable: no mapping is
required.
.PP
\fINote\fR \ \(em\ Dropping DTR may be used by the TE2 to indicate to the
TA to clear the logical link or call.
.sp 1P
.LP
A.2
\fISR\(hysend ready (bit 6)\fR
.sp 9p
.RT
.PP
The SR bit maps according to DTE attachment as follows:
.RT
.LP
\(em
for sending SR\(hySR(S) state variable;
.LP
\(em
indicates request to send (RTS \(em Recommendation V.24
circuit 105) status from DTE;
.LP
\(em
for receiving SR\(hySR(R) state variable;
.LP
\(em
drives receive line signal detect (RLSD \(em
Recommendation\ V.24 circuit\ 109) to DTE;
.LP
\(em
the received ST bit is also mapped to the send RR bit (i.e.\ SR(R)\ \(ra\
RR(S)).
.sp 1P
.LP
A.3
\fIRR\(hyreceive ready (bit 5)\fR
.sp 9p
.RT
.PP
The RR bit maps according to DTE attachment as follows:
.RT
.LP
\(em
for sending RR\(hyRR(S) state variable: no mapping is required;
.LP
\(em
for receiving RR\(hyRR(R) state variable:
.LP
\(em
drives ready for send (RFS \(em Recommendation V.24
circuit 106) to DTE.
\v'6p'
.ce 1000
APPENDIX\ I
.ce 0
.sp 1P
.ce 1000
(to Recommendation V.120)
.sp 9p
.RT
.ce 0
.sp 1P
.ce 1000
\fBTE1 application\fR
.sp 1P
.RT
.ce 0
.PP
The protocols and procefures defined in Recommendation V.120 may be used
for data transport by compatible TE1s as well as terminal adapters (TAs).
In the TE1 case, the interface at the R\ reference point is effectively
replaced by a virtual interface within the TE1 to a higher layer entity.
This appendix describes the application of Recommendation\ V.120 in TE1s.
.sp 1P
.RT
.sp 2P
.LP
I.1
\fIAsynchronous mode operation\fR
.sp 1P
.RT
.sp 1P
.LP
I.1.1
\fITransmission onto the ISDN channel\fR
.sp 9p
.RT
.PP
The B, F bits are set to \*Q1\*U, and the C1 and C2 bits in the header
are set to\ \*Q0\*U. The data to be transmitted is segmented as required,
and each segment is appended to the header before transmission.
.PP
If a BREAK is received from the next higher layer, a frame with the BR
bit set to\ \*Q1\*U in the header will be transmitted at the earliest opportunity
following data queued for transmission.
.bp
.RT
.sp 1P
.LP
I.1.2
\fIReception from the ISDN channel\fR
.sp 9p
.RT
.PP
Processing of received data is as follows, based on the values of the C1
and C2\ bits in the header:
.RT
.LP
\(em
if the C1 and C2 bits are both set to \*Q0\*U, the received
characters are forwarded to the next higher layer without error indication;
.LP
\(em
if the C1 bit is set to \*Q1\*U, then a parity error indication is forwarded
to the next higher layer with the characters received; the parity error
applies to the last character in the frame;
.LP
\(em
if the C2 bit is set to \*Q1\*U, then a stop\(hybit error is
forwarded to the next higher layer with the characters received; the error
occurred immediately following the last character in the frame.
.PP
If the BR bit is set to \*Q1\*U in the header of the received frame, then
a BREAK indication is forwarded to the next higher layer after all data
queued has been forwarded.
.sp 1P
.LP
I.2
\fISynchronous mode operation\fR
.sp 9p
.RT
.PP
The messages passed to and received from the higher layer include the HDLC
address and control fields, but do not include HDLC flags, FCS or
inserted \*Q0\*Us.
.RT
.sp 1P
.LP
I.2.1
\fITransmission onto the ISDN channel\fR
.sp 9p
.RT
.PP
The message length is compared with N2xx. The message is processed depending
on its length as follows:
.RT
.LP
\(em
if the message length is less than or equal to N2xx, then the entire
message is appended behind the header and both in the B and F\ bits set
to\ \*Q1\*U. The resulting message is then transmitted;
.LP
\(em
if the message length is greater than N2xx, the first N2xx
octets are appended to the header, with the B\ bit set to\ \*Q1\*U and
the F\ bit set to\ \*Q0\*U. The resulting message is then transmitted;
.LP
\(em
if the remaining portion of the message is greater in length than N2xx,
the next N2xx octets are appended to the header, with both
the B and F\ bits set to\ \*Q0\*U. The resulting message is then transmitted;
.LP
\(em
if the length of the remaining portion of the message is less than or
equal to N2xx, then the remaining portion of the message is
appended to the header with the F\ bit set to\ \*Q1\*U and the B\ bit set
to\ \*Q0\*U. The resulting message is then transmitted.
.PP
The C1 and C2 bits are normally set to \*Q0\*U.
.sp 1P
.LP
I.2.2
\fIReception from the ISDN channel\fR
.sp 9p
.RT
.PP
Any messages that were segmented at the transmit end are
reassembled as indicated by the B and F header bits.
.PP
The header of a received frame will be checked for error conditions as follows:
.RT
.LP
\(em
if the \*Qbegin\*U segment bit is \*Q1\*U and the previous segment
did not have the \*Qfinal\*U segment bit set to\ \*Q1\*U, then the previous
message will be aborted;
.LP
\(em
if the \*Qbegin\*U segment bit is set to \*Q0\*U and there is no
message currently in process, the segment will be discarded;
.LP
\(em
if the C1 or C2 error bit is \*Q1\*U with the \*Qfinal\*U bit a \*Q1\*U,
the message will be discarded.
.PP
If a frame is received with the BR bit set to \*Q1\*U in the header, then
the TE1 management entity will be notified of an HDLC idle condition sent
from the far end. The HDLC idle condition is maintained until a frame is
received with the BR\ bit in its header set to\ \*Q0\*U.
.PP
When a message has been reassembled it is passed to the next higher
layer.
.RT
.sp 2P
.LP
I.3
\fIBit transparent mode operation\fR
.sp 1P
.RT
.sp 1P
.LP
I.3.1
\fITransmission onto the ISDN channel\fR
.sp 9p
.RT
.PP
The transmitting entity accepts data from the process using its
services, segments the data into segments of length at most N2xx, and transmits
that data within frame to its peer entity. The length of the data segments
and the length of the transmitted interframe time fill are adjusted so
that the
average data transmission rate matches the rate selected during call
establishment.
.bp
.RT
.sp 1P
.LP
I.3.2
\fIReception from the ISDN channel\fR
.sp 9p
.RT
.PP
The receiving entity upon receiving a frame from its peer entity, checks
the FCS and if the FCS is valid it passes any data contained in the
frame to the process using its services. If the FCS is not valid the entity
may, on an application specific basis, discard the data contained in the
errored frame or pass that data, with or without error indication, to the
process using the services of the entity.
.RT
.sp 1P
.LP
I.4
\fITE1 control state variable processing\fR
.sp 9p
.RT
.PP
In TE1 applications, the six control state variable DR(S), SR(S), RR(S),
DR(R), SR(R), and RR(R) are maintained as described in \(sc\ 2.3.6, with
the following meanings:
.RT
.LP
\(em
for sending DR \(em DS(S) state variable:
.LP
\(em
indicates that the sending TE1 is powered up and
connected for communication;
.LP
\(em
for receiving DR \(em DR(R) state variable:
.LP
\(em
indicates that the sending TE1 (far end) is powered up and connected
for communication;
.LP
\(em
for sending SR \(em SR(S) state variable:
.LP
\(em
indicates that the sending TE1 is ready to send
frames;
.LP
\(em
for receiving SR \(em SR(R) state variable:
.LP
\(em
indicates that the sending TE1 (far end) is ready to
send frames;
.LP
\(em
for sending RR \(em RR(S) state variable:
.LP
\(em
indicates that the sending TE1 is ready to receive
frames;
.LP
\(em
for receiving RR \(em RR(R) state variable:
.LP
\(em
indicates that the sending TE1 (far end) is ready to
receive frames.
.PP
The following sections describe the procedures for control state variable
processing in a TE1 using V.120. Note that the control states in a TE1
as described above are essentially analogous to those in a TA as described
in \(sc\ 2.3.6. Thus, the TE1 control state variable processing described
below is
completely compatible with that described in \(sc\ 2.6 for the TA.
.sp 1P
.LP
I.4.1
\fIControl state variable initialization\fR
.sp 9p
.RT
.PP
Whenever the protocol is initialized to start communications, the protocol
entity will set the receive state variables (DR(R), SR(R), and RR(R)) to\
\*Q0\*U and the send state variables to reflect the status of the TE1 as
described above.
.RT
.sp 1P
.LP
I.4.2
\fISending a control state information octet\fR
.sp 9p
.RT
.PP
A control state information octet will be sent whenever a send
control state variable changes. A send control state variable will change
with a change to the state of the TE1 as described above. A frame containing
the
control state information octet will be sent following any queued data
for the interface at the S/T reference point.
.PP
The control state information field is sent in the last frame
assembled when the control state change occurs, or in a separate frame.
.PP
The contents of the control state information octet is set to the
state of the corresponding send control state variables. DR is set to DR(S),
SR is set to SR(S), and RR to RR(S).
.RT
.sp 1P
.LP
I.4.3
\fIReceiving a control state information octet\fR
.sp 9p
.RT
.PP
Upon receipt of a control state information octet, the control
field is checked with the receive control state variables: DR to DR(R),
SR to SR(R), and RR to RR(R). The receive control state variables are set
to their
received values.
.PP
If SR(R) was \*Q0\*U and the SR bit in the received control state
information octet is \*Q1\*U, notification is made to the TE1 management
entity.
.PP
If SR(R) was \*Q1\*U and the SR bit in the received control state
information octet is \*Q0\*U, notification is made to the TE1 management entity
consistent with one of the following:
.RT
.LP
\(em
if received data (from the peer entity) does not remain to be forwarded
(no message in progress), then the control actions can occur
immediately;
.LP
\(em
if received data (from the peer entity) is incomplete (e.g. in protocol
sensitive mode the final frame is not received), then the
incomplete message is forwarded with indication of incomplete message and
the notification made to the TE1 management entity;
.LP
\(em
if received data (from the peer entity) is complete, the
message is forwarded and the notification of the TE1 management entity
occurs.
.bp
.PP
If RR(R) and the RR bit in the received control field differ,
notification is made to the TE1 management entity.
.PP
If DR(R) was \*Q0\*U and the RR bit in the received control field is \*Q1\*U,
notification is made to the TE1 management entity.
.PP
If DR(R) was \*Q1\*U and the DR bit in the received control field is \*Q0\*U,
then notification is made to the TE1 management entity consistent with
the
following:
.RT
.LP
\(em
if received data from peer entity is incomplete, it is
discarded;
.LP
\(em
if received data from peer entity is a complete message, then it should
be forwarded until completion prior to the control actions taking
place.
\v'1P'
.ce 1000
APPENDIX\ II
.ce 0
.sp 1P
.ce 1000
(to Recommendation V.120)
.sp 9p
.RT
.ce 0
.sp 1P
.ce 1000
\fBClock synchronization\fR
.sp 1P
.RT
.ce 0
.PP
Figure II\(hy1/V.120 shows two DTE/DCE configurations and their respective
clock synchronization.
.sp 1P
.RT
.LP
.rs
.sp 25P
.ad r
\fBFigure II\(hy1/V.120, p.\fR
.sp 1P
.RT
.ad b
.RT
.PP
In the first case in Figure II\(hy1/V.120, the TA is providing the
clocks to the DTE or DCE. In the second case in Figure\ II\(hy1/V.120, the DCE
provides the Receive Clock to the TA for data to the DTE, and the TA at
the DTE end provides the Receive Clock to the DTE for this same data.
.PP
There are three strategies which could be used for clock tracking. The
first is to use the data buffers as clock variance buffers by having these
buffers absorb the accumulated clock variance. In this case, no clock tracking
is performed. If the buffer is completely depleted, and under\(hyrun occurs
causing an error on the synchronous interface at the R\ reference point.
Buffer space over\(hyrun can also happen, causing an error. However, the
buffer
accumulation or depletion to the point of over\(hyrun or under\(hyrun due
to clock
error is a slow process and is predictable in the worst case within the
CCITT clock tolerance of 100\ parts per
.bp
.PP
million. The second strategy is for the clocks
at both ends to be synchronized to the network. This strategy solves the
problem but is not applicable to case\ 2 in Figure\ II\(hy1/V.120. The third
strategy is to monitor the buffer state as data is being received from the
interface at the S/T reference point in the TA that is providing the Receive
Clock to the DTE. This strategy monitors the rate of data at this interface
by checking the buffer state when a new frame is received, and adjusts
the clock speed accordingly.
.PP
For asynchronous applications, the first strategy (no clock
correction) should be sufficient. For these applications a clock tolerance
of +1/\(em2.5% is permissible, see Recommendation\ V.14. Under\(hyrun is
not possible and buffering in the TA should be sufficient to avoid over\(hyrun.
.PP
For synchronous mode applications, appropriate buffer setup and
management using no clock correction should be sufficient.
.PP
For bit transparent mode applications, continuous data does not allow for
buffer resynchronization. For case\ 2 the frames are read into a buffer
at the receiving TA and are clocked out to the TE2 by a time source derived
in the TA. If the data is clocked out at the rate transmitted, each frame
will fill
the receive buffer to precisely the same level. If the rate is low the fill
level will increase and provide an indication that the clock rate must be
increased and vice versa.
.PP
In some implementations, the clock adjustments might be in the form of
repeated small adjustments in the phase of the clock, which would be derived
from the ISDN network clock. Where the TE2 is tolerant of large phase steps
the process may be simple.
.RT
.ce 1000
APPENDIX\ III
.ce 0
.sp 1P
.ce 1000
(to Recommendation V.120)
.sp 9p
.RT
.ce 0
.sp 1P
.ce 1000
\fBBearer channel initialization procedures\fR
.sp 1P
.RT
.ce 0
.ce 1000
\fBfor circuit switched applications\fR
.ce 0
.PP
To reduce the possibility of transmitting a frame to a TA that is not yet
connected:
.sp 1P
.RT
.LP
\(em
a TA that receives a CONNect message from the network should always transmit
a frame to initiate the connection, and
.LP
\(em
a TA that receives a CONNect ACKnowledge message from the
network should wait for T200 or until it receives a frame (whichever is
earlier) before transmitting a frame.
.LP
.rs
.sp 23P
.sp 2P
.LP
\fBMONTAGE: RECOMMANDATION V.230 SUR LE RESTE DE CETTE PAGE\fR
.sp 1P
.RT
.LP
.bp